please answer part a, b, c and d

QUESTION \# 3 ( 10 points) Consider a computer hardware supports hierarchical page table implementation to reduce page table size requirements for each process. Consider following specifications to answer this question. Virtual address space =4 giga byte. Physical address space =4 giga byte. Page size =2 Kbyte. Hierarchical page table support =(101111) bits Entry size of inner and outer page table =4 bytes A process is using 3 pages of its total address space (logical memory), those pages are page #0,511 and 1023 . All Other pages are considered invalid or not used. Each of these pages of logical memory can be mapped to page frame \# 1000,2000,3000 respectively. a) Draw paged logical memory, physical memory with their outer and inner page table(s) design. Label each of memory diagrams with address ranges, page \# and page frame numbers and page tables with valid entries. b) How many page tables are used and what will be the total size of page tables. c) Mention how much physical address space will be covered with one inner page table. d) Convert following logical addresses to physical addresses 0x003ff800 hexadecimal 0x7ffff800 hexadecimal 0xfffff800 hexadecimal