Please be a detailed as possible on how you got the answers to the problem.

Given a virtual memory system with the following specification:

The memory is byte addressable.

Each memory access is to 1-byte word.

Each virtual address is 16-bit wide.

Each physical address is 12-bit wide.

The page size is 32 bytes (25)

The TLB is 2-way set associative with 16 total entries.

The L1 data-cache is physically addressed and direct mapped, with a 4 byte line size and 16 total sets.

The current states of the TLB and the page table:

If the CPU issues a virtual address of 0x0D6:

Do we have a TLB hit?

Do we have a page fault?

What is the physical address?

2-way Set Associative TLB Set IndexTag PPN ValidTagPPN Valid Way 0 Way 1 03 09 OD1 02 08 03 OD 1 07 01 0A 01 01 03 2D 02 07- 04 06 0A 34 Page Table (first 16 PTEs PPN VPN Valid 28 03 02 03 16 02 07 13 17 09 2D 0D