Please do question $5-6$ urgent!!!

Question $5$: $[10$ marks$]($Moderate but Tricky$)$

Given the circuit in Figure $1$ in positive logic, complete the timing diagram if the memory units are:

a$.[5$ marks$]$ Latches.

b$.[5$ marks$]$ Flip$-$flops

Question $6$: $[15$ marks$]$

Assuming the memory units in the circuit in Figure $1$ are single$-$edge flip$-$flops in positive logic:

a$.[5$ marks$]($Easy$)$ Is the circuit based on the Mealy or Moore model? Justify your answer.

b$.[5$ marks$]($Moderate$)$ Draw the state $($transition$)$ diagram.

c$.[5$marks$]($Moderate$)$ Derive the state table.