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8 20 points) For the architecture shown, write the sequence of signals and control actions necessary to execute the instruction STR DO, [P, D1], that adds the contents of the memory location pointed at by the contents of memory location P plus the contents of register D1 and uses that as the effective address to store the contents of DO. M[M[P] D1] DO A-P-1 Data out 0 1Copy+to busA 10 Copy Q-1 to bus A 1 1 1 Copy bus P-10buA Main store EuThe mer Data in and a w MAR MBR IR PC DO D1 ALU Latch 1 (PO Latch 2 Function select F, F, F Cycle Concrete RTL Signals 10 8 20 points) For the architecture shown, write the sequence of signals and control actions necessary to execute the instruction STR DO, [P, D1], that adds the contents of the memory location pointed at by the contents of memory location P plus the contents of register D1 and uses that as the effective address to store the contents of DO. M[M[P] D1] DO A-P-1 Data out 0 1Copy+to busA 10 Copy Q-1 to bus A 1 1 1 Copy bus P-10buA Main store EuThe mer Data in and a w MAR MBR IR PC DO D1 ALU Latch 1 (PO Latch 2 Function select F, F, F Cycle Concrete RTL Signals 10