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Q4

An asynchronous circuit that has 2 inputs, XY and one output required to give an output whenever the input sequence (00), (01) and (11) is received, but only in that order. Its operation is described by a primitive flow table shown in Table 1. Table 1 OUTPUT INPUT, XY 01 11 00 10 Z (1) 2 4 0 0 4 1 0 1 (2) 3 6 (3) 1 5 6 (5) 1 (6) 5 Note: (x) are stable states : x) 0 0 a) Construct the state diagram using Mealy model based on the given flow table showing 6 internal states. b) Reduce the flow table using implication chart, if possible. c) By using the merging process, produce the merged flow table. An asynchronous circuit that has 2 inputs, XY and one output required to give an output whenever the input sequence (00), (01) and (11) is received, but only in that order. Its operation is described by a primitive flow table shown in Table 1. Table 1 OUTPUT INPUT, XY 01 11 00 10 Z (1) 2 4 0 0 4 1 0 1 (2) 3 6 (3) 1 5 6 (5) 1 (6) 5 Note: (x) are stable states : x) 0 0 a) Construct the state diagram using Mealy model based on the given flow table showing 6 internal states. b) Reduce the flow table using implication chart, if possible. c) By using the merging process, produce the merged flow table