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5. Design a digital circuit with four inputs that will output a 1 if the majority (3 or 4) of the inputs are 1. Use K-map to find the reduced Boolean expression, draw the circuit diagram, and write the System Verilog code that implements your circuit design. 5. Design a digital circuit with four inputs that will output a 1 if the majority (3 or 4) of the inputs are 1. Use K-map to find the reduced Boolean expression, draw the circuit diagram, and write the System Verilog code that implements your circuit design