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5. You are given a logic circuit with the following characteristics: active-low synchronous reset i.e. resets on a logic-0) two control inputs (x and y) . a register, R If x-1 and y-0, R is incremented by 1, and control shifts from the initial state toa second state. If x-0 and y-1, register R gets cleared (to zero) and control shifts from the initial state to a third state. For any other input combinations, control stays in the initial state. (a) draw a block diagram showing the controller, datapath unit (with any internal registers) and signals [2pts (b) the partial ASMD chart which shows the initial state, and its relationship to the other two states [3pts Note that, for (a), Figure 8.22(a) of your book on p.517 should be helpful as a guide to the format