please solve it quickly

the two photo down ( part 1 & 2 ) is more clear check it firt

see the two picture down

The purposeste de inted in the words to the In the past you will stand mee sadece se inplemented in the previous to the Yeede hotele - Acer with cowymi ..... The Scrably one that you have written doe The MS for the B- typy profil the value of the research where in die MITS meal The meaty w we meny is able Alus, make their locked by wade A besef vertel deur dilatie. You da demehest of your design Y my laeste problems your design the simulator Feb 2030 2031 Suppose we wapewe Madden wewnia Samedi-pemain the Find the date the deepesten intrict de legitim Submit the whole Testing and Student Portal with proper is pjammu Greason the changes dod in the depth and Part I: In this assignment, you will test and simulate the MIPS single-cycle data path that you have implemented in the previous la sessions (lab l through lab 3). You should submit a report that includes the following items: A cover page with the necessary information (title, name, ID, date, etc). The MIPS assembly code that you have written to test your design. The MIPS code should test all instructions. o For the R-type instructions, you should test at least two types of instruction. For beq instruction, you should test the case when the branch is taken and when it is not taken. In the waveform, make sure to show the input clock, the instruction being executed, the current PC, the value of the registers and the data memory output that will be changed after executing each instruction (It is recommended to show the MIPS code and related information in a form of a table). The memory address and the encoding of each instruction that you have loaded to the instruction memory The simulation results and vector waveform with proper comments. Make sure the waveform is readable. Also, make sure to show the correct number of clock cycles needed to execute your assembly code A brief verbal description of the simulation results (waveform). You need to explain how your simulation results demonstrate the correctness of your design. You should mention if you have any issue or problem with your design or the simulation results. Part II: Suppose we want to add support for new instructions to the MIPS single-cycle data path. The new instruction is Set Less Than Immediate, (SLTI). It is an I-type format instruction. Its opcode is 1001. The instruction operates as the following: if (R[nt] > Imm) R[rs) - 1 Else R[rs) - 0 Find the minimum modification to the single-cycle data path to allow the correct execution of the SLTI instruction in addition to the existing instructions. Include the following items in your report and submission: Use the Quartus block editor tools to highlight your modification on the block/schematic diagram. Submit the whole Quartus project files Testing and Simulation results of Part II with proper justification. Give a short description of the changes needed in the data path and control unit. Part I: In this assignment, you will test and simulate the MIPS single-cycle data path that you have implemented in the previous lab sessions (lab 1 through lab 3). You should submit a report that includes the following items: A cover page with the necessary information (title, name, ID, date, etc). The MIPS assembly code that you have written to test your design. The MIPS code should test all instructions. For the R-type instructions, you should test at least two types of instruction. For beq instruction, you should test the case when the branch is taken and when it is not taken. In the waveform, make sure to show the input clock, the instruction being executed, the current PC, the value of the registers and the data memory output that will be changed after executing each instruction (It is recommended to show the MIPS code and related information in a form of a table). The memory address and the encoding of each instruction that you have loaded to the instruction memory The simulation results and vector waveform with proper comments. Make sure the waveform is readable. Also, make sure to show the correct number of clock cycles needed to execute your assembly code. A brief verbal description of the simulation results (waveform). You need to explain how your simulation results demonstrate the correctness of your design. You should mention if you have any issue or problem with your design or the simulation results. Part II: Suppose we want to add support for new instructions to the MIPS single-cycle data path. The new instruction is Set Less Than Immediate, (SLTI). It is an I-type format instruction. Its opcode is 1001. The instruction operates as the following: if( R[nt] > Imm) R[rs) - 1 Else R[rs) - 0 Find the minimum modification to the single-cycle data path to allow the correct execution of the SLTI instruction in addition to the existing instructions. Include the following items in your report and submission: Use the Quartus block editor tools to highlight your modification on the block/schematic diagram. Submit the whole Quartus project files Testing and Simulation results of Part II with proper justification. Give a short description of the changes needed in the data path and control unit. The purposeste de inted in the words to the In the past you will stand mee sadece se inplemented in the previous to the Yeede hotele - Acer with cowymi ..... The Scrably one that you have written doe The MS for the B- typy profil the value of the research where in die MITS meal The meaty w we meny is able Alus, make their locked by wade A besef vertel deur dilatie. You da demehest of your design Y my laeste problems your design the simulator Feb 2030 2031 Suppose we wapewe Madden wewnia Samedi-pemain the Find the date the deepesten intrict de legitim Submit the whole Testing and Student Portal with proper is pjammu Greason the changes dod in the depth and Part I: In this assignment, you will test and simulate the MIPS single-cycle data path that you have implemented in the previous la sessions (lab l through lab 3). You should submit a report that includes the following items: A cover page with the necessary information (title, name, ID, date, etc). The MIPS assembly code that you have written to test your design. The MIPS code should test all instructions. o For the R-type instructions, you should test at least two types of instruction. For beq instruction, you should test the case when the branch is taken and when it is not taken. In the waveform, make sure to show the input clock, the instruction being executed, the current PC, the value of the registers and the data memory output that will be changed after executing each instruction (It is recommended to show the MIPS code and related information in a form of a table). The memory address and the encoding of each instruction that you have loaded to the instruction memory The simulation results and vector waveform with proper comments. Make sure the waveform is readable. Also, make sure to show the correct number of clock cycles needed to execute your assembly code A brief verbal description of the simulation results (waveform). You need to explain how your simulation results demonstrate the correctness of your design. You should mention if you have any issue or problem with your design or the simulation results. Part II: Suppose we want to add support for new instructions to the MIPS single-cycle data path. The new instruction is Set Less Than Immediate, (SLTI). It is an I-type format instruction. Its opcode is 1001. The instruction operates as the following: if (R[nt] > Imm) R[rs) - 1 Else R[rs) - 0 Find the minimum modification to the single-cycle data path to allow the correct execution of the SLTI instruction in addition to the existing instructions. Include the following items in your report and submission: Use the Quartus block editor tools to highlight your modification on the block/schematic diagram. Submit the whole Quartus project files Testing and Simulation results of Part II with proper justification. Give a short description of the changes needed in the data path and control unit. Part I: In this assignment, you will test and simulate the MIPS single-cycle data path that you have implemented in the previous lab sessions (lab 1 through lab 3). You should submit a report that includes the following items: A cover page with the necessary information (title, name, ID, date, etc). The MIPS assembly code that you have written to test your design. The MIPS code should test all instructions. For the R-type instructions, you should test at least two types of instruction. For beq instruction, you should test the case when the branch is taken and when it is not taken. In the waveform, make sure to show the input clock, the instruction being executed, the current PC, the value of the registers and the data memory output that will be changed after executing each instruction (It is recommended to show the MIPS code and related information in a form of a table). The memory address and the encoding of each instruction that you have loaded to the instruction memory The simulation results and vector waveform with proper comments. Make sure the waveform is readable. Also, make sure to show the correct number of clock cycles needed to execute your assembly code. A brief verbal description of the simulation results (waveform). You need to explain how your simulation results demonstrate the correctness of your design. You should mention if you have any issue or problem with your design or the simulation results. Part II: Suppose we want to add support for new instructions to the MIPS single-cycle data path. The new instruction is Set Less Than Immediate, (SLTI). It is an I-type format instruction. Its opcode is 1001. The instruction operates as the following: if( R[nt] > Imm) R[rs) - 1 Else R[rs) - 0 Find the minimum modification to the single-cycle data path to allow the correct execution of the SLTI instruction in addition to the existing instructions. Include the following items in your report and submission: Use the Quartus block editor tools to highlight your modification on the block/schematic diagram. Submit the whole Quartus project files Testing and Simulation results of Part II with proper justification. Give a short description of the changes needed in the data path and control unit