Please solve the question and not give me the steps to solve it

I hope the solution is on paper with steps

Q$1$: Using Half and full subtractors, design a $4-$bit binary subtractor.

Q$2$:

A BCD$-$to$-$seven$-$segment decoder is a combinational circuit that converts a decimal

digit in BCD to an appropriate code for the selection of segments in an indicator used

to display the decimal digit in a familiar form. The seven outputs of the decoder $,$

$d,e,f,g$ select the corresponding segments in the display, as shown in Fig. P$4\mathrm{.}9($a$).$ The

numeric display chosen to represent the decimal digit is shown in Fig. P$4\mathrm{.}9($b$).$ Using

a truth table and Karnaugh maps, design the BCD$-$to$-$seven$-$segment decoder using a

minimum number of gates. The six invalid combinations should result in a blank display.

$($a$)$ Segment designation

$($b$)$ Numerical designation for display