Posting again. I need help with #2. please do not copy from another post thanks

2. Here is a series of addresses in hexadecimal: 20(w), 3C(r), 10(r), 16(w), 20(r). 04(w), 28(r). 6(r), 10(w). 17(w) Assume a LRU replacement algorithm. For the four caches in problem 1, draw each cache as it would appear at the end of the series of references. Include the valid bit, dirty bit, and tag. Show the contents of the memory block using the byte address range such as M[20-23] for the word with address 22 I need help on this question. Please do not copy anyone elses answers. I need to know the correct way to do this. Thanks. Also below is question 1 answered to help with #2. 1. There are 4 caches with the organzation and block sze as indicated below. All caches hold 128 words where each word is 4 bytes. Assuming a 32-bit address. a. A direct-mapped cache with block size of 16 words b. 2-way set-associative cache with block size of 8 words c. 4-way set-associative cache with block size of 4 words d. A fully associative cache with block size of 32 words Complete the table for each cache Cache a Cache b Cache c Cache d 4 total # bits need for word + byte displacement # bits needed for index # bits needed for tag 23 24 25 25 # bits (total) per set (including valid and | 537 282 155 1051 bits