(Priority Encoder r1, ro, and 3 data outputs /2, y, yo, and one additional output bi z which asserts 0 when all data inputs are 0 and asserts 1 otherwise. Clearly write down the truth table. Determine a logic expression for each output. Finally, write Verilog code to implement this prioity encoder. 6. Design an 8-to-3 priority encoder which has 8 data inputs z7, z6-x5, 24, x3-22