Problem #1 (a) Describe two key differences between write-through and write-back policy. (b) Describe the function and differences between dirty bit, valid bit and replacement policy (such as LRU) bits. (c) What are the three types of cache misses? For each describe one technique for reducing the rate of the miss type. (d) Why are the first level caches usually split (instructions and data are in different caches) while L2 is usually unified (instructions and data are both in the same cache)? Provide concise reasoning. (e) Consider a SEC (Single Error Correcting) code that protect 8 bit words with 4 parity bits. If we read the value 375H, is there an error? If so, correct the error. (f) Explain the given terms and their usefulness in evaluating the system reliability and availability: Mean Time Between Failures (MTBF), Mean Time to Replacement (MTTR), and Mean Time To Failure (MTTF). (g) Describe the key design parameters of a cache.