Problem #1 Consider the combinational circuit shown in the Figure below: Ti Fi T4 F2 (a) Derive the Boolean expressions for Tl through T4. Evaluate the outputs Fl and F2 as a function of the four inputs. (b) List the truth table with 16 binary combinations of the four input variables. Then list the binary values for T1 through T4 and outputs F1 and F2 in the table. (c) Plot the output Boolean functions obtained in part (b) on maps and show that the simplified Boolean expressions are equivalent to the ones obtained in part (a). (d) Write and verify a gate-level HDL model of the circuit using only Verilog language Schematic approach is not accepted.Use the computer for this part. (b) Compare your results with those obtained for (a)-) using the simulation waveforms