Problem $1$: Extended Surfaces

As more and more components are placed on a single integrated circuit $($chip$),$ the amount of heat that

is dissipated continues to increase. However, this increase is limited by the maximum allowable chip

operating temperature, which is approximately $75C.$ To maximize heat dissipation, it is proposed that a

$44$ array of copper pin fins be metallurgically joined to the outer surface of a square chip that is $12\mathrm{.}7$

mm on a side. Note that the fins tip is exposed to convection heat transfer.

$($a$)$ Sketch the equivalent thermal circuit for the pin$-$chip$-$board assembly, assuming one$-$dimensional,

steady$-$state conditions and negligible contact resistance between the pins and the chip. In variable

form, label appropriate resistances, temperatures, and heat rates.

$($b$)$ For the conditions prescribed in Problem $5$ in homework$1,$ what is the maximum rate at which heat

can be dissipated in the chip when the pins are in place? That is$,$ what is the value of $q_c$ for $T_c=75C?$

The pin diameter and length are $D_p=1\mathrm{.}5mm$ and $L_p=15mm.$

$($C$)($Bonus$)$ the prescribed value of $h_0=1000\frac{W}{m}2.K$ is large and characteristic of liquid cooling. In

practice it would be far more preferable to use air cooling, for which a reasonable upper limit to the

convection coefficient would be $h_o=250\frac{W}{m}2.$ K$.$ Assess the effect of changes in the pin fin geometry

on the chip heat rate if the remaining conditions of the problem, including a maximum allowable chip

temperature of $75C,$ remain in effect. Parametric variations that may be considered include the total

number of pins, $N,$ in the square array, the pin diameter $D_p,$ and the pin length $L_p.$ However, the product

$N^{\frac{1}{2}}{D}_p$ should not exceed $9$ mm to ensure adequate air flow passage through the array. Recommend a

design that enhances chip cooling.