Question: Problem 2 ( 1 0 pts ) a ) ( 4 pts ) Represent the following SR latch using a CMOS configuration. b ) (

Problem 2(10 pts)
a)(4 pts) Represent the following SR latch using a CMOS configuration.
b)(4 pts) Compute the rising propagation delay of the CMOS SR latch.
c)(2 pts) Represent the SR latch using transmission gates. Explain.
Problem 2 ( 1 0 pts ) a ) ( 4 pts ) Represent the

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