Problem #2 (12 pts: 4pts per function) Find a minimum two-level multiple-output AND-OR gate network to realize these functions with don't care entries (X's) assuming that both normal inputs (A,B, C,D) and inverted inputs (A;B',C',D') are provided: F(A,B,C,D) (m3,m4,m7) + 2 (d5,d6,d8) G(A,B,C,D)-2 (m2,m5,m10,m14) +2 (d6, d13) H(A,B,C,D)-2 (m4, m5, m13, m15) (d2,d3, d14) Use Karnaugh maps to reduce the functions and implement them in logic works. Sharing gate outputs may reduce total gate count