Problem #2 1-Design a combinational circuit with three inputs and one output. (a) The output is 1 when the binary value of the inputs is less than 3. The output is 0 otherwise (b) The output is 1 when the binary value of the inputs is an even num. 2- Design a combinational circuit that generates the 9's complement of a BCD digit. Write and verify a gate-level HDL model of the circuit using Verilog language. Schematic approach is not accepted. Use the computer for this part. 3- (a) Design a half-subtractor circuit with inputs x and y and outputs Diff and Bot. The circuit subtracts the bits x - y and places the difference in D and the borrow in Bout Design a full-subtractor circuit with three inputs x, y, Bia and two outputs Diff and Bout. The circuit subtracts x y Ba, where Ba is the input borrow, Bout is the output borrow, and Diff is the difference