Question: Problem 4 (10 points) We talked about multiplexors in the class. A 4-1 multiplexor has 6 inputs S1, S0, d3, d2, d1, and d0, and

Problem 4 (10 points) We talked about multiplexors in the class. A 4-1 multiplexor has 6 inputs S1, S0, d3, d2, d1, and d0, and has one output O. It works as follows. If S1S0-00, O-d0. If S1S0-01, o-d1. If S1S0-10, o-d2. If S1S0-11, o-d3. Show how to use only one 4-1 multiplexor to implement function E(A,B,C) with truth table shown below. No any other gates should be used, including the inverter; meaning that the inputs to the 4-1 multiplexor can only be from A, B, C, 0, or 1. Please finish the following figure, showing each input of the 4-1 multiplexor is connected to which one among A, B, C, 0, or 1, as your answer. No Verilog code or simulation is needed. For this problem, no Karnaugh-map is needed SO de
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