Problem $4$: An FSM is to be designed to monitor an incoming bit stream $A$ in groups of three bits,

one at a time. The FSM asserts its output only when it observes an odd number of $1\text{'}$s in a single

triplet.

$($a$)$ Draw and label the state diagram for this FSM

$($b$)$ Modify the code in the appendix to implement this FSM$.$