Question: Problem # 5 ( Again . . . ) : In the schematic diagram below, assume the following: V D D = + 3 V

Problem #5(Again...): In the schematic diagram below, assume the following:
VDD=+3V,VSS=-3V.
the ratio beside each transistor is the WL ratio,
all n-type devices have kn'=0.1mAV2 and Vt=0.6V and =0.05V-1.
all p-type devices have kp'=0.04mAV2 and Vt=-0.8V and =0.04V-1.
all transistors in the saturation region.
v+=v-=0V for DC .
(b) Find the midband gain vouv+-v-
(c) The 10 pF is placed in the circuit to increase Cgd8 to create a single, dominant high frequency pole. Assuming all other capacitors have negligible effect, estimate the high frequency cutoff fH.
(d) Add a resistive feedback network to the amplifier to form a non-inverting amplifier with a gain of 4, then estimate the resulting bandwidth and output impedance. Rowt f=Rin(1+A,B)
D)A1+4B=34.71+344(14)=3.45
Putf =Rout1+A,fDP=fP(1+A)
Rat = rdruine??rdrnins
=SK
=2.24
PCHA=2.2k1+(399)(14)25.2
Problem # 5 ( Again . . . ) : In the schematic

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