Problem 6. A block diagram and state graph for a shift-and-add multiplier for positive binary numbers is shown below. The counter counts the number of shifts and outputs a signal K -1 after 2 shifts. Assume St 1 for exactly one clock cycle. Complete the following table showing the operation of the circuit if the multiplicand is 10011 and the multiplier is 110: State Counter St M K |Ad |sh 000000110 1 X-Register Sh Ld Clock Ad St Add-Shift Sh Control Clock Counter St S/ Ad Problem 6. A block diagram and state graph for a shift-and-add multiplier for positive binary numbers is shown below. The counter counts the number of shifts and outputs a signal K -1 after 2 shifts. Assume St 1 for exactly one clock cycle. Complete the following table showing the operation of the circuit if the multiplicand is 10011 and the multiplier is 110: State Counter St M K |Ad |sh 000000110 1 X-Register Sh Ld Clock Ad St Add-Shift Sh Control Clock Counter St S/ Ad