Problem 6 Assuming MEM[0x78] = 10 and given the assembly code shown on the next page:

Problem 6 Assuming MEM[0x78] = 10 and given the assembly code shown on the next page: 1. Explain what the code is trying to do. Write out its C equivalent. 2. What is the dynamic instruction count for this process? Can it be reduced? 3. How would this program function on a pipelined CPU? Use transition diagrams. 4. Can you identify any problems with this assembly code? Explain. Spring2020 / EC513/ Hw2 lw x8, 120 (0) addi x4, x0, 4 mul x13, x8, x4 addi x5, x0, O add x10, x5, x5 jr check loop: lw x6, 0(x10) add x9, x10, x13 lw x7, 0(x9) add x12, x6, x7 add x9, x9, x13 sw x12, 0(x9) addi x5, x5, 1 addi x10, x10, 4 check: bne x5, x8, loop exiti Problem 6 Assuming MEM[0x78] = 10 and given the assembly code shown on the next page: 1. Explain what the code is trying to do. Write out its C equivalent. 2. What is the dynamic instruction count for this process? Can it be reduced? 3. How would this program function on a pipelined CPU? Use transition diagrams. 4. Can you identify any problems with this assembly code? Explain. Spring2020 / EC513/ Hw2 lw x8, 120 (0) addi x4, x0, 4 mul x13, x8, x4 addi x5, x0, O add x10, x5, x5 jr check loop: lw x6, 0(x10) add x9, x10, x13 lw x7, 0(x9) add x12, x6, x7 add x9, x9, x13 sw x12, 0(x9) addi x5, x5, 1 addi x10, x10, 4 check: bne x5, x8, loop exiti