Problem $6$:

To compute a floating$-$point square root, a computer uses a sequence of floating$-$point operations as it does not

support square root operations in hardware. i$.$e$.,$ there is no instruction to compute the square root in one step.

Suppose we have made the following measurements:

frequency of all floating$-$point operations $($including square root operations$)=25\%$

CPI of all floating$-$point operations $($including square root operations$)=4$

$,$ CPI of non floating$-$point operations $=2$

frequency of floating$-$point square root operations $=5\%$

CPI of floating$-$point square root operations $=20$

Which of the following two design alternatives will improve the performance of the computer better?

a$.$ Reduce the CPI of all floating$-$point operations to $2\mathrm{.}5$

b$.$ Add floating$-$point square root operations in hardware to reduce their CPI to $4$ without changing the CPI

of the remaining floating$-$point operations.