Question: Problem B . A loop and an if-statement are written in Assembly code as below. Loop: IF-Statement: . DO SUB R6, R6, #4 TST R1,

Problem B. A loop and an if-statement are written in Assembly code as below.

Loop: IF-Statement:

.

DO SUB R6, R6, #4 TST R1, #0x80000000

ADD R3, R3, #1 BEQ STORE

CMP R6, R5 MVN R1, R1

BGE DO ADD R1, R1, #1

LDR R2, [R6] STORE STR R1, [R4]

The recent history of BGE DO in the Loop is not-taken and the recent history of BEQ STORE in the IF-statement is taken. Assuming that [R6] = 0x00008080 and [R5] = 0x00008070 when BGE DO is fetched in the Loop and [R1] = 0x12345678 when BEQ STORE is fetched in the IF-statement.

(Hint: in each question, the 1st blank needs to be filled with the instruction fetched after the branch instruction; and the 2nd blank needs to be filled with proceeds with full speed or stalls.

The pipeline with static or dynamic branch prediction is assumed to use the example approach given in the PPT slides.)

(a) A MIPS pipeline fetches _______________________ after BGE DO and ____________________.

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