PROCEDURE 1. Create a module with required number of variables and mention its input/output. 2. Write the description of the counter to count required number of states and to satisfy its conditions. 3. Create another module referred as test bench to verify the functionality. CODE // binary counter module p18(clk,count ); output [3:0] count ; reg [3:0] count ; input clk ; wire clk ; initial count = 0; always @ (posedge (clk)) begin count <= count + 1; end endmodule