Project: Single purpose processer

using FPGA Signed Multiplier$($booth algorithm$).$

Design single purpose processor that performs

n $-$bit sign multiplication. $($ A$***$B$).$ Output is $2$ n bit.

You can use minimal number of adders and shift

registers. Using multiplier is prohibited

Write your algorithm

Trace your algorithm step$-$by$-$step using

$($i$)2$ positive $8$ bit numbers, $($ii$)2$ negative

$8$bit number and $($iii$)$ two different sign $8$bit

number

Design FSM$,$ FSMD

Design Datapath

Design Control unit