Q $13.$ What is setup time in the context of sequential circuits?

Ops: A$.$ The time interval during which the input signal must be stable before the clock edge to ensure proper data capture.

B$.$ The maximum time allowed for the output signal to settle to its final value after the clock edge.

C$.$ The time delay between the application of the clock signal and the response of the circuit's output.

D$.$ The minimum time required for the clock signal to propagate through the entire circuit.