Q$1.(5$ points$)$ Assume a $5-$stage MIPS pipeline implementation: a$)$ No forwarding;

b$)$ No IF$/$ME or ID$/$WB conflicts; c$)$ Predict branch not taken; d$)$ branch address

available after ME stage $($i$.$e$.$ the correct instruction is fetched in the WB stage of

the branch instruction$).$

$1)$ Show the pipeline diagram, from the IF stage of I$1($first loop iteration$)$ to

the IF stage of I$1($second loop iteration$).$ Each cycle needs to have a full

pipeline representation$\mathrm{.}1$

$(3$ points$2$

$)$

$2)$ Calculate the total cycles of the entire program and the CPI of a single loop

iteration. Explain how the number is calculated. $(2$ points$)$