Question: Q 1 . ( 8 0 points ) Considering ( n o + 1 7 ) 1 0 = ( abcdefg ) 2 , design
Q points Considering abcdefg design a synchronous sequence detector circuit that detects 'abcdefg' from a onebit serial input stream applied to the input of the circuit with each active clock edge. The sequence detector should detect overlapping sequences.
a Derive the state diagram, describe the meaning of each state clearly. Specify the type of the sequential circuit Mealy or Moore
b Determine the number of state variables to use and assign binary codes to the states in the state diagram,
e Choose the type of the FFs for the implementation. Give the complete state table of the sequence detector, using reverse characteristics tables of the corresponding FFs
d Obtain Boolean functions for state inputs. Also obtain the output Boolean expression,
e Draw the corresponding logic circuit for the sequence detector.
f Verify your design by providing Logisim simulation of the obtained circuit and show the corresponding truth table in Logisim
Q points Assign #no h to #no:h and #no h to :#no h write a program that store;
a The sum of these two numbers in #no:h
b The difference of these two numbers in #no:h
c The product of these two numbers in no:h
d After the division of these two numbers, the quotient in #no:h and remainder is in #no:h
Ex: for :
NOTE: You have to add comment line to your code that explain your code.
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