Q$1.$ Consider the following sequence o instructions, and assume that it is executed on a $5-$ stage pipelined data path:

add $r5,r2,r1\frac{?}{?}$# $I1$

$Iwr3,4(r5)\frac{?}{?}$# $I2$

$Iwr2,0(r2)\frac{?}{?}$# $I3$

$orr3,r5,r3\frac{?}{?}$# $I4$

$swr3,0(r5)\frac{?}{?}$# $I5$

a$.$ List the read$-$after$-$write $($current instruction is reading certain registers which haven't been written back yet$)$ data dependencies. As an example, $2$ on $1($r$5)$ shows instruction $2$ has data dependency on instruction $1$ since it is reading register $$r5.$

b$.$ Assume the $5-$stage MIPS pipeline with no forwarding, and each stage takes $1$ cycle. Instead of inserting NOPs, you let the processor stall on hazards. How many times does the processor stall? What is the total number of stall cycles?

c$.$ What is the execution time $($in cycles$)$ for the whole program? Sketch a diagram to explain your answer.

d$.$ Assume the $5-$stage MIPS pipeline with full forwarding. Insert NOPs to eliminate the hazards. Sketch a diagram to verify your answer.