Q$20.$ A register file has $16$ registers each having $16$ bits. The registers $RF[0]$ to $RF[15]$ contain

positive or negative binary numbers. Design an HLSM that will find the sum of absolute

values of the $16$ numbers stored in $RF[0]$ to $RF[15].$ The negative numbers are in $2\text{'}$s

complement form. The sum is going to be stored in a separate SUM register. Upon reset, the

HLSM will be in the initial state waiting for the GO signal. When the operation is completed

the HLSM will return to its initial state and wait for a GO signal to start over again. Show

your design clearly.

$($a$)$ Capture the system behavior as an HLSM and draw the state transition diagram.

$($b$)$ Design the datapath for this HLSM$.$ Specify each component in the datapath clearly $($i$.$e$.$

name of the component, input signals, output signals, number of bits, etc.$).$

$($c$)$ Connect the datapath to the controller $($FSM$)$ and show the signals between the controller

and the datapath.

$($d$)$ Derive the FSM and draw the state transition diagram.