Q$2[60]$: For the code sequence given below, fill out the status of reservation stations

and register result status table from cycle $1$ to cycle $6.$ The functional units are

described in the table below. There are three load buffer entries. The load instruction

takes $2$ cycles to complete $($to calculate address and access memory$).$

fld $,$ fo$,0(x1)$

fld $,f2,0(x2)$

fmul.d $f4,f2,$ fo

fadd.d $,f8,f4,f8$

fld f$6,32($x$1)$

fsub.d f$6,$ f$6,$ f$8$

$($Cycle $2)$

Lead Buffers

Register Result Status

$\backslash$table$[[$Clock$],[2]]$

please try to do cycle $1$ to cycle $6,$ I will upvote for you