Q$2$: $[80$ marks: main workout$]$ We want to design a $2-$bit subtractor in $2$s$-$complement system. Let X$=$X$1$X$0,$ and Y$=$Y$1$Y$0.$ We need to perform R$=$X $$ Y$,$ where R$=$R$1$R$0.$ Also, there might be an overflow. So$,$ we need another output called Ovf. In total, there should be $4$ Boolean variables in the left $($input$)$ side of the truth table, and $3$ Boolean functions Ovf, R$2,$ and R$1$ in the right $($output$)$ side. a$)$ Complete below truth table $[40$ marks: $16$ rows $*2\mathrm{.}5$ marks each$]($hint: when Y becomes $2,$ i$.$e$.,$ Y$=10,$ weird things happen $...)$ b$)$ Write Ovf, R$1$ and R$2$ functions based on an efficient number of gates $($SOP vs$.$ POS$)[30$ marks: $10$ marks for each function$]$ c$)$ Draw the circuit only for Ovf based on a single universal gate $($either NOR$-$ or NAND$-$only gates$)[10$ marks$]$