Question: Q 5 ) There is a 2 5 6 byte, 4 - way set associative cache where each cache block contains 1 6 bytes on

Q5) There is a 256 byte, 4-way set associative cache where each cache block contains 16 bytes on a 16-bit processor with \(2^{16}\) addressable bytes of memory. Assume that the cache is initially empty (all valid bits are zero). Suppose we are accessing the memory addresses in the order of:
0x0010,0x0032,0x03B8,0x0035,0x0027,0x00AF.
a) How many of these address requests are hits/misses?
b) What is the hit ratio?
c) How many blocks are replaced?
Q 5 ) There is a 2 5 6 byte, 4 - way set

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