Q1.10 Control dependences 3 Points Control dependences can be carefully violated as long as we can keep the data flow and exception behavior correctly. O True O False Q1.11 long latency 3 Points A pipelined architecture that can handle instructions with long latency was discussea lecture. The pipeline allows instructions to be issued out-of-order. O True O False Q1.12 cpi 3 Points A change in the clock cycle time will cause an inverse change in the CPI of programs run on that machine. O True O False