Q1.13 inst count 3 Points A computer modification that changes the instruction count will have no impact on the number of clocks per instruction O True O False Q1.14 exception 4 Points Suppose that the following MIPS 32 instruction sequence is executed on the 5-stage MIPS pipeline in Appendix C in the textbook. MemAddr 0x3728 0x3720 Ox3730 Ox3734 Instruction add $2, $2, $6 add $1, $2, $1 slt $15, 96, 97 $16, 50 (97) 1w Suppose that an arithmetic overflow exception occurs in the instruction add $1, $2, $1. What is the memory address value the PC register has at the start of the clock cycle after the exception is detected? Enter your answer here Q1.15 mips64 memory 3 Points In MIPS64 memory system, a unique address is assigned for every word but not for every byte. True False