Q5. Maximum sequence length detection Design a detection circuit that detects the maximum length of 1's string in a 16-bit long bit stream. When "start" signal becomes (valid for 1 clock cycle), the detector inputs1 bit every clock cycle and updates the maximum length of 1's string of the admitted bit stream so far. The answer of the detection is obtained on the 16th clock cycle din adetector Length[4:0] 00101 Max length is 5 start clk length 2 length 3 length 1 module max_seq detection(clk,start, din, length) input lk; input start; input din; output [4:0] length; data output port/ reg [4:0] length; * rising edge triggered */ * becomes for 1 clock cycle long at the negative edge of the clock * * data input port/ endmodule int: you need a counter, which resets itself if a "O" is admitted and increments if otherwise. You also need a register to keep the current max length. Each time a l's string is terminated by a "O", the counter value is compared with the register value and the larger one stays