Question $1.$ Design Entry $[4$ marks $]$ Part A$.$ VHDL $[4$ marks$]$ Name: VHDLsupports modeling and simulation of digital systems at various levels of design abstraction$.$ A half adder is a digital circuit that has two inputs X and Y$.$ It adds the two input digits and generate a carry $($C$)$ and a sum $($S$).$ i$.$ What are the three design styles that VHDL supports? ii$.$ What are the limitations of using the bit data type predefined in the language? iii. Write the VHDL code for a half adder