Question $1$

Looking at the Cache Memory design above, for each of the following memory requests,

enter in the provided place the byte value being requested. If you get a miss, enter "miss", and

if you get invalid, enter "invalid".

Memory request from address $011000000,$ the referenced byte is

Memory request from address $000000001,$ the referenced byte is

Memory request from address $011000010,$ the referenced byte is $[$miss$].$

Memory request from address $011000100,$ the referenced byte is

Memory request from address $011000111,$ the referenced byte is