Question $21(0\mathrm{.}5$ points$)$

Which of the following best describes why RISC architectures like ARM require separate load$/$store instructions for operations involving memory?

Question $21$ options:

To increase the program size and execution time

To enhance the complexity of the instruction set

To simplify the processor design and enable more efficient pipelining

To allow for a broader range of operations with a single instruction

Question $22(0\mathrm{.}5$ points$)$

In which scenarios is buffering used to manage data transfer? $($Select all that apply$)$

Question $22$ options:

Reading a file from a hard disk

Adjusting monitor brightness

Streaming video from an external hard drive

Writing data to a printer

Question $23(5$ points$)$

Scenario:

A single$-$sided single$-$platter disk operates with the following parameters: a rotational speed of $5400$ rpm$,800$ tracks per surface, a sector size of $2$ kB$,$ a seek time of $0\mathrm{.}8$ ms for every two tracks traversed, and a disk capacity of $20$ MB$.$ The disk controller processes data at a rate of $5$ MB$/$s$.$

Questions:

a$.$ How many sectors are on a track?

b$.$ What is the average seek time to move from track $100$ to track $300?$

c$.$ What is the rotational latency for a disk spinning at $5400$ rpm$?$

d$.$ What is the transfer time for reading $5$ sectors$?$

e$.$ What is the total time to satisfy a request to read a sector from track $0$ to track $50,$ assuming the head is at the first sector of track $0?$

Question $23$ options:

a: The number of sectors on a track is $\_\_.$

b: The average seek time to move from track $100$ to track $300$ is $\_\_$ ms$.$

c: The rotational latency for the disk is $\_\_$ ms$.$

d: The transfer time for reading $5$ sectors is $\_\_$ ms$.$

e: The total time to satisfy a request to read a sector from track $0$ to track $50$ is $\_\_$ ms$.$

$($Optional$)$ reasoning:

Question $24(0\mathrm{.}5$ points$)$

Which characteristic is more aligned with RISC $($Reduced Instruction Set Computer$)$ architecture?

Question $24$ options:

Variable instruction lengths to support complex instructions.

A rich set of addressing modes within a single instruction.

The ability to perform memory$-$to$-$memory operations in a single instruction.

Fixed instruction length to streamline decoding and execution.

Question $25(6$ points$)$

Scenario:

A program comprising $150$ instructions is executed on a processor with a $4-$stage pipeline. This pipeline encounters control hazards due to $20$ branch instructions. The processor utilizes a branch prediction technique with a $70\%$ accuracy rate, and each mispredicted branch incurs a $3-$cycle penalty due to the need to flush and refill the pipeline.

Task:

Calculate the total execution time of the program in cycles, considering the impact of control hazards from branch instructions, and compute the overall Cycles Per Instruction $($CPI$).$

Assumptions:

Total Instructions: $150$

Branch Instructions: $20$

Branch Prediction Accuracy: $70\%$

Misprediction Penalty: $3$ cycles

Calculations:

a$.$ Calculate the total number of cycles for instructions without considering control hazards.

b$.$ Determine the number of correctly predicted branches and

c$.$ the number of mispredictions.

d$.$ Calculate the additional cycles incurred due to mispredictions.

e$.$ Compute the total execution time by adding the base cycles and the penalty cycles.

f$.$ Calculate the overall CPI by dividing the total execution time by the number of instructions.

Question $25$ options:

a$.$ Total Number of Cycles Without Control Hazards: $\_\_$

b$.$ Number of Correctly Predicted Branches: $\_\_$

c$.$ Number of Mispredictions: $\_\_$

d$.$ Additional Cycles Due to Mispredictions: $\_\_$

e$.$ Total Execution Time in Cycles: $\_\_$

f$.$ Overall CPI: $\_\_$

$($Optional$)$ reasoning:

Question $26(4$ points$)$

Scenario:

To store $6$ TB of data, we compare the requirements for an LTO$-7$ tape, which has a data density of $7,140$ bits per inch $($bpi$)$ across $3,584$ tracks, with an LTO$-5$ tape, which has $1,280$ tracks and a data density of $1,488$ bpi.

Questions:

a$.$ Convert $6$ TB of data into bits.

b$.$ Calculate bits per track for LTO$-7$ using its data density and number of tracks.

c$.$ Determine the required tape length for LTO$-5$ in inches, based on its data density and track count to store the same amount of data.

d$.$ Convert the required LTO$-5$ tape length from inches to meters.

Question $26$ options:

a: The total capacity in bits is $\_\_.$

b: The bits per track for LTO$-7$ is $\_\_$ bits.

c: The required tape length for LTO$-5$ in inches is $\_\_$ inches.

d: The required tape length for LTO$-5$ in meters is $\_\_$ meters.

$($Optional$)$ reasoning:

Question $27(0\mathrm{.}5$ points$)$

When handling a keyboard interrupt, what is the sequence of steps followed by the processor?

Question $27$ options:

Execute the interrupt handler, save the current state, identify the interrupt source, restore the state.

Save the current state, identify the interrupt source, execute the interrupt handler, restore the state.

Restore the state, save the current state, identify the interrupt source, execute the interrupt handler.

Identify the interrupt source, save the current state, execute the interrupt handler, restore the state.

Question $28(1$ point$)$

An enterprise requires a storage solution with maximum fault tolerance for their critical financial data. They choose RAID $60,$ which offers redundancy through double parity. If the enterprise deploys $16$ disks, each with $1\mathrm{.}5$TB of storage, into four RAID $6$ sets before striping, how much total usable storage will they have?

Question $28$ options: