Question $2.[$Loop Unrolling$][30$ pts$]$

Consider the following loop in a simple assembly language, which is executed on a $5-$stage RISC pipeline:

Loop: ld x$1,0($x$2)$ # Load value from memory address x$2$ into register x$1$

addi x$1,$ x$1,1$ # Increment x$1$ by $1$

sd x$1,0($x$2)$ # Store the updated value of x$1$ back to memory address x$2$

addi x$2,$ x$2,8$ # Increment x$2$ by $8$ to point to the next memory location

sub x$3,$ x$3,$ x$4$ # Decrement the loop counter x$3$

bnez x$3,$ Loop # Branch back to Loop if x$3$ is not zero

Assume that the loop runs $4$ times initially and that the pipeline has full forwarding$/$bypassing hardware, but branches cause a $2-$cycle penalty when mispredicted. Additionally, memory references $($loads and stores$)$ take $1$ cycle each.

$($a$)(10$ pts$)$ Unroll the loop $2$ times. Show the unrolled version of the loop.

$($b$)(10$ pts$)$ Compare the performance $($number of cycles$)$ of the original loop and the unrolled loop, assuming perfect branch prediction after unrolling.

$($c$)(10$ pts$)$ Calculate the speedup achieved as a result of unrolling