Question 2 Provide solution for Question 2 and explain reasoning in detail a) Develop a Finite State Machine (FSM) that recognize the pattern "11" or "110" within a sequence of bits that are read in series. When we recognize the pattern, we assign the output R to 1. Here is an illustration of the desired behavior. R. 0 TempsI b) Consider the following FSM 01 reset 00+01+10 00+11+10 1) Give the transition state table and the output table (if necessary) describing the behavior 2) Write a truth table of this machine by using a binary encoding 3) Write a truth table of this machine by using a "one hot" encoding 4) Code this machine in VHDL