Question 22 Not yet answered Consider a computer system with 2 levels of caches L1 and L2. L1 Cache has I-Cache and a D-Cache. The I cache has a miss rate of 17.2% and the D-Cache has a miss rate of 10.6%. The miss penalty to L2 cache is 30 cycles. L2 cache miss rate is 53.3% and the miss penalty to the main memory is 127 cycles. The frequency of all data operations is 37.5%. Assuming a processor with no memory stalls has a CPI of 3. What is the CPI with memory stalls? Marked out of 7.00 Flag question Select one: O a. 23.69 O b. 28.17 O c. 30.16 O d. 21.00 O e. 2692519.79 O f. None of the options