QUESTION $3)[15$ points$]$ A Bus interface will be designed for a $8086$ CPU $($minimum mode$).$

a$)[8$ points$)$ Draw the Addr eas Latch Oecien schemacic dingram that shows the connections between CPU and all $74373$ Address Latch chips.

b$)[7$ points$]$ Draw the Da$\text{'}$ a Buffer Design schemabic diagram that shows the connections between CPU and all $74245$ Data Buffer chips.