Question $3.$ Performance Metrics$-$Execution time$][30$ pts$]$ A multi$-$cycle processor P$1$

executes load instructions in $6$ cycles, store instructions in $6$ cycles, arithmetic instructions in $2$

cycles, and branch instructions in $2$ cycles. Consider an application A where $40\%$ of all

instructions are load instructions, $20\%$ of all instructions are store instructions, $30\%$ of all

instructions are arithmetic instructions, and $10\%$ of all instructions are branch instructions.

a$.(15$ pts$)$ What is the CPI of application A when executing on processor P$1?$ Show

your work.

b$.(15$ pts$)$ You want to improve the original P$1$ design by including one new

optimization without changing the clock frequency. You can choose only one of the

following options:

$1)$ ALU: An optimized ALU, which halves the latency of both arithmetic and branch

instructions

$2)$ LSU: An asymmetric load$-$store unit, which halves the latency of load

operations but doubles the latency of store operations.

Which optimization do you add to P$1$ for application A$?$ Show your work and justify your

choice