Question 33 Not yet answered The classic CPU performance equation is written as Marked out of 1.00 Flag question Select one: a. CPI = (Instruction count) x (CPU time) x (Clock cycle time) b. Instruction count = (CPU time) x (CPI) (Clock cycle time) O c. Clock cycle time = (Instruction count) x (CPI) x ( CPU time) d. CPU time = (Instruction count) x (CPI) x (Clock cycle time) Question 34 Not yet answered 1. A compiler designer is trying to decide between two code sequences for a particular computer. The hardware Marked out of designers have supplied the following facts: CPI for R-type instruction is 1. CPI for I-type instruction is 2, and CPI 100 P Flag for J-type instruction is 3. The two sequences have the following instruction counts: question Code sequence 1: R-type (2), i-type (1), )-type (2) Code sequence 2: R-type (4), i-type (1), -type (1) Which code sequence needs more clock cycles? Select one: a code sequence 1 O b. code sequence 2 c. Both code sequences need same amount of clock cycles Question 36 Not yet answered Supercomputer is a class of computers with the highest performance and cost; they are configured as servers and Marked out of 100 typically cost millions of dollars Flag Soler, Select one: question a. False b. True Question 37 Not yet answered Data center is a room or building designed to handle the power, cooling, and networking needs of large number of servers Marked out of 1.00 P Flag question Select one: a. False b. True Question 38 Not yet answered 1. A compiler designer is trying to decide between two code sequences for a particular computer. The hardware Marked out of 100 designers have supplied the following facts: CPI for R-type instruction is 1, CPI for I-type instruction is 2, and CPI Flag question for J-type instruction is 3. The two sequences have the following instruction counts: Code sequence 1: R-type (2). I-type (1), J-type (2) Code sequence 2: R-type (4), I-type (1), J-type (1) Which code sequence executes more instructions? Select one: a. Both code sequences execute same number of instruction b. Code Sequence 2 c. code Sequence 1