QUESTION $4$

$($a$)$ Implement the functions $f_1(x_2,x_1,x_0)=$prodM$(1,2,3,6,7)$ and $f_2(x_2,x_1,x_0)=$prodM$(0,1,3,4,5)$ using OR$-$gates along with a $3-$to$-8$ decoder. $($Note that $x_2$ is the most significant bit whereas $x_0$ is the least significant bit.$)$

$[7$ marks$]$

$($b$)$ Consider the $q,$

Note that $A$ is the most significant bit whereas $C$ is the least significant bit.

i$.$ Draw the truth table and hence suggest a practical use for the circuit above.

$[4+2$ marks $]$

ii$.$ With appropriate standard gates and a $2-$to$-1$ multiplexer, design an equivalent circuit.

$[4$ marks$]$

$($c$)$ A full adder $($FA$)$ is a multiple$-$output combinational logic network that adds three binary bits, i$.$e$.,$ two data bits and $B)$ and one carry$-$in bit $(C_0),$ produces a sum bit $(S)$ and a carryout bit $)$ output signals.

i$.$ Draw the truth table for a FA$.$

$[4$ marks$]$

ii$.$ Implement a FA using a $1-$to$-8$ demultiplexer with active$-$high outputs and appropriate standard gates.

$[4$ marks$]$

End of Paper