(Question 6 continued from the previous page.) b) (5 marks) Use case statements to complete the code for a 4:1 multiplexer. The use area and the entity area are already given. You need to write the architecture part. library IEEE; use IEEE.STD_LOGIC 1164.ALL; use IEEE.STD _LOGIC_UNSIGNED.ALL; entity MUX41 is PORT (In1, In2, In3, In4 : in std_logic_vector(3 downto 0); Sel: in stdlogic_vector(1 downto 0); Output: out std_logic_vector(3 downto 0); end MUX4_1