Question #7-2 marks): The memory unit of the basic computer shown in Fig. 5-3 is to be changed to a 65,536x16 memory, requiring an address of 16 bits. The instruction format of a memory-reference instruction shown in Fig. 5-5(a) remains the same for I-1 (indirect address) with the address part of the instruction residing in positions 0 through 11. But when I-0 (direct address), the address of the instruction is given by the 16 bits in the next word following the instruction. Modify the microoperations during time T2, T3, (and T4, if necessary) to conform with this configuration. Question #7-2 marks): The memory unit of the basic computer shown in Fig. 5-3 is to be changed to a 65,536x16 memory, requiring an address of 16 bits. The instruction format of a memory-reference instruction shown in Fig. 5-5(a) remains the same for I-1 (indirect address) with the address part of the instruction residing in positions 0 through 11. But when I-0 (direct address), the address of the instruction is given by the 16 bits in the next word following the instruction. Modify the microoperations during time T2, T3, (and T4, if necessary) to conform with this configuration