Question about Translation lookaside buffer(TLB) in memory management.

I.) Why is TLB is such an important component of a memory management unit (MMU) .

II.) What is a TLB miss, and what operations the MMU must undertake when a TLB miss occurs..

iii.) Certain events cause all of the entries in a specific CPUs TLB to be invalidated (sometimes called a TLB shootdown). What type of event causes such behavior, and why must it happen ?

iv). The TLB miss rate is a critical factor in system performance, and is a direct function of the size of the TLB. If system designers want high performance, why dont they just build very large TLBs into their CPUs ?